Monday, July 7, 2008
Tackling EDA’s Broken Business Model: Blaze DFM
EDA vendors are struggling to survive when they should be engaged innovation. Innovation, including business model innovation, is beginning to emerge on the fringes of EDA. Here I talk with Blaze DFM CEO Jacob Jacobsson about the EDA environment and how a small company you may have never heard of, is slowly changing the game.
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Friday, June 20, 2008
How Chip Toolmakers Can Survive
If the leaders of the semiconductor industry took a moment to think about the future, they would come to the conclusion that electronic design automation (EDA) vendors deserve royalties from the chips they help design and make successful.
A small EDA company, Blaze DFM, has made some progress along these lines. The Sunnyvale, Calif., company, which makes tools that increase the yield of chips, gets royalty fees from chip makers.
Thursday, June 19, 2008
Blaze DFM at the 45th Design Automation Conference
What: Blaze DFM at the 45th Design Automation Conference (DAC)
When: June 9-12, 2008
Where: Anaheim Convention Center, Anaheim California
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When: June 9-12, 2008
Where: Anaheim Convention Center, Anaheim California
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Thursday, May 29, 2008
The DFM melting pot
Blaze DFM has not shed the DFM part of its name because it continues to address this market. One possible reason is that one of its co-founders Dr. Andrew Kahng in a recognized leader in the field and thus can provide technical insights that are often superior than those of the competition. To be sure, the company has also looked for innovative ways to address the market. About two months ago Blaze DFM announced an agreement with TSMC that the company called an innovative business arrangement.
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Mentor's Ponte purchase consolidates DFM technology
There's still a place for independent DFM providers, said Dave Reed, vice president of marketing and business development at Blaze DFM. "The problem of parametric yield loss in advanced nodes provides ample market opportunity to support a pure-play DFM company such as Blaze," he said. "I think market size was the biggest challenge for the physical DFM tool providers such as Ponte."
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Blaze is now the "lone ranger" in the [DFM] segment
The acquisition of DFM firm Ponte Solutions by EDA firm Mentor Graphics not only takes one of the last pure DFM companies off the table, it also answers the question about what side of the chip making wall DFM belongs, and terminates an inflection point that might not be seen again for a decade or more. This might be the end of consolidation in DFM/EDA (Blaze is now the "lone ranger" in the segment, noted [Gary] Smith), but hardly the end of DFM technology innovation.
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Thursday, May 1, 2008
Cadence Languishes On
Cadence still isn’t taking any bold step in fighting out the EDA worries. One company that it should take a very close look at is Blaze DFM. It is a company that is making a direct impact on yield, and has partnered with TSMC to actually participate in customers’ gains.
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Monday, April 28, 2008
Is it an EDA tool or a manufacturing tool? Blaze DFM raises the question
Design tools that interact with both design and process databases are becoming increasingly common as we move deeper into the world of design-for-manufacturing (DfM.) So far, most of the discussion in the industry has been about how we will import enough foundry data into the design tool chain to empower DfM tools. But the recent relationship announcement involving Blaze DFM and TSMC raises the other side of the question: are there times when a DfM tool is properly a foundry tool and not a design tool?
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Deal puts leakage power reduction into TSMC flow
The exclusive deal allows TSMC to use a version of Blaze MO to increase the length of transistor gates on circuits that are not timing critical to cut their leakage power. Blaze DFM and TSMC have worked with a selection of foundry customers on a trial of the Power Trim programme since the middle of last year.
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Wednesday, April 16, 2008
DFM heads into the foundry
Sometimes, small deals can wind up changing the shape of a market. The deal between Blaze DFM and TSMC that has been gestating for close to a year is possibly one of them: it recalls the giant leap of faith that Artisan took when it came up with the "free library" idea.
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Tuesday, April 15, 2008
TSMC Announces Power Trim Service for Advanced Chip Leakage Power Reduction
Exclusively-licensed technology from Blaze DFM, Inc. enables design-specific leakage power reduction offering
Hsin-chu, Taiwan, R.O.C. – April 15, 2008 - Taiwan Semiconductor Manufacturing Company, Ltd.
(TSE: 2330, NYSE: TSM) today announced that it has signed an exclusive agreement with Blaze DFM, Inc. to offer Power Trim Service, a new service offering combining a patented Blaze power optimization technology with special variations of TSMC’s advanced manufacturing process.
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Hsin-chu, Taiwan, R.O.C. – April 15, 2008 - Taiwan Semiconductor Manufacturing Company, Ltd.
(TSE: 2330, NYSE: TSM) today announced that it has signed an exclusive agreement with Blaze DFM, Inc. to offer Power Trim Service, a new service offering combining a patented Blaze power optimization technology with special variations of TSMC’s advanced manufacturing process.
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Tuesday, March 4, 2008
EDA Is Stepping Up to Meet New DFM Demands
"Smaller, faster, and cheaper” has been the mantra of the semiconductor industry for over 40 years. But the latest 45- and 32-nm technology nodes have many in the semiconductor industry crying “uncle.” Efforts to deliver technology on the timeline demanded by Moore’s Law have collided head-on with the economic realities of semiconductor manufacturing. It’s just too costly. Students of “techonomics” (the interdependency of technology and economics) have one heck of a case study on their hands.
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Tuesday, February 19, 2008
E-DFM - The Future of Parametric Yield Success
Mentor Graphics officially jumps onto the electrical DFM bandwagon created by Blaze.
At 45nm, yields exhibit drastic drop-offs, and designs fail to consistently achieve their technical and competitiveness objectives. As more and more features are placed into smaller and smaller spaces, the unintended effects of this “crowding” are creating havoc with yield and performance. The tools we have today simply aren’t designed to recognize and resolve these issues.
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At 45nm, yields exhibit drastic drop-offs, and designs fail to consistently achieve their technical and competitiveness objectives. As more and more features are placed into smaller and smaller spaces, the unintended effects of this “crowding” are creating havoc with yield and performance. The tools we have today simply aren’t designed to recognize and resolve these issues.
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Where’s the ROI in DFM?
To most designers the answer to the question “Where is the ROI in DFM?” remains somewhat illusive. But panelists at last week’s DesignCon 2008 said that as more designs move to advanced processes, the return on DFM investment will become evident as DFM will become mandatory.
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Is DFM a vitamin or a cure?
In a DesignCon 2008 panel entitled "Where is the ROI for DFM?" design for manufacturability was likened to a vitamin – it doesn’t hurt and it might do you good. So, what is the reality? Is DFM a vitamin or a cure? To find out, we report on the panel’s deliberations, as well as on a separate interview with one of the panelists, the leader of Freescale’s corporate DFM initiative.
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EDA CEOs see opportunity despite recession fears
A global recession may be unfolding, but the EDA industry will continue to do well because of the value it provides to an increasingly fabless semiconductor industry, according to EDA CEOs at an EDA Consortium "forecast panel" here Thursday (Feb. 7). But speakers also acknowledged pricing pressure and project delays.
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EE Times updates list of emerging startups
The EE Times 60 Emerging Startups list, first published in April 2004, has been updated to version 7.0 to reflect the latest corporate, commercial, technology and market conditions.
Some companies have dropped off the list — otherwise known as the Silicon 60 — because they have been acquired; some have moved on to an initial public offering of shares; and others have moved beyond the list with the passage of time.
Tuesday, February 5, 2008
Driven By Power Concerns, DFM Goes Mainstream In 2008
Due to the growth in the consumer and wireless markets, low-power design is becoming a pervasive driver in IC design, verification, and implementation. The challenge lies in achieving timing closure while adopting advanced low-power and mixed-signal techniques—while improving time-to-volume and yield.
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Wednesday, January 30, 2008
Gate leakage, down and out?
A high-k dielectric process for CMOS transistors promises to turn the International Semiconductor Roadmap into a freeway by eliminating the gate-leakage problem at advanced nodes down to 10 nanometers.
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